| 摘要 |
PURPOSE: To reduce a high speed phase synchronizing current drain when a PLL exists in either one of ends of a lock-up range by turning a current source to a disabled circuit when voltage on the output of a circuit is larger or smaller than a prescribed value. CONSTITUTION: A current supplying source 48 or a current absorbing source 50 is turned on by a gate circuit 46 for leading a voltage controlled oscillator(VCO) 16 to a proper direction in order to obtain synchronization. The mutual connection of the current sources 48, 50 connected in series is connected to a low pass filter on a terminal A so as to quickly charge/discharge a capacitor 22 with electricity. When the PLL is deviated from a phase synchronized state in order to hold control voltage to be supplied to the VCO 16 in the action range of the VCO 16, clamping TRs 42, 44 control the variation of the control voltage on the terminal A. Thereby the VCO 16 is maintained within the controllable range. |
