| 摘要 |
PURPOSE: To use the chip area of an integrated circuit efficiently, by so forming capacitors that they can be constructed through their interconnection patterns whose under paths are determined respectively by users. CONSTITUTION: A non-custom structure of a capacitor is formed in an n<-> -type epitaxial layer 11 on a p<-> -type silicon substrate 12. Disposing an n<+> -type buried layer 14 insulated from its adjacent capacitor elements by p<-> -type regions 13 in the boundary between the epitaxial layer 11 and the substrate 12, an n<+> -type region 15 is provided on the buried layer 14 and oxide layers 16, 16a are formed thereon to provide a window 17 connected with a polycrystal silicon layer laid in the deep n<+> type region 15. In order to form the capacitor, there is provided such a post-insulation material 32 that a polysilicon layer portion 31a disposed on the oxide layer 16a is insulated electrically from a polysilicon layer portion 31b contacted with the n<+> -type region 15. Then, providing metallization layers 33a, 33b, the layer 33a is connected with the n<+> -type layer 15 via the portion 31b and the layer 33b is connected with the portion 31a to use the thin oxide layer 16a as the dielectric of the capacitor. Therefore, the chip area of an integrated circuit can be used effectively. |
