| 摘要 |
<p>The methods of operation and logic design of a digital, memory-plus-processor unit (203) are given. This unit both stores and multiplies matrices within it. Each unit stores one or more bits of each element of a matrix. Multiple units (202, 203) work together to give the precision of the matrix desired. Data may be represented in either fixed-point or floating-point format. Each unit combines a high capacity, very-wide-word memory (300) that stores one or more large matrices, a lower capacity memory (319) that is loaded from the high capacity memory and stores a vector or a smaller matrix, and highly parallel, simple processing logic (307) that feeds an on-chip, global adder and accumulator circuit (308).</p> |
