发明名称 OUTPUT CIRCUIT
摘要 PURPOSE:To prevent occurrence of noise by not operating a MOS transistor, into the gate of which a delay element is inserted, but operating each one of MOS transistor on the pull-up and pull-down sides at a transient changing time when the output level changes. CONSTITUTION:When input signals are switched from an 'H'-level to an 'L'- level, a transistor 14 for shifting level is turned on by means of a control signal from a CMOS inverter circuit 13 and the voltage of a Zener diode 18 drops due to the turning-on current of the transistor 14. Since a resistance is inserted into the gate of a transistor 21, the signal voltage to the gate is delayed and the transistor 21 is not turned on in this transient period. The transistors for pull-up and pull-down are separated into two pieces in such way and the gate signal is delayed at the transient changing time of an output Out. When MOS transistors 19 and 21 on one side are not operated, but only transistors 16 and 17 are operated in such way, occurrence of electromagnetic interference, etc., can be prevented.
申请公布号 JPH025610(A) 申请公布日期 1990.01.10
申请号 JP19880156461 申请日期 1988.06.24
申请人 TOSHIBA CORP 发明人 UENO SHOJI
分类号 G09G3/20;H03K5/02;H03K17/12;H03K17/16;H03K17/567;H03K17/687;H03K19/0175;H03K19/08 主分类号 G09G3/20
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