| 摘要 |
PURPOSE:To attain rapid code-added non-recovery type division by adding a several circuit to an arithmetic logical operation circuit (ALU) to be frequently built especially in a microcomputer or the like. CONSTITUTION:In the 1st cycle, the arithmetic logical operation circuit (ALU) 106 is instructed by a control signal 113 from a control circuit 112 so as to add an output signal 105 obtained by shifting dividend data 12 to the upper digit b one bit through a shift circuit 104 to divisor data 101 when a dividend code signal 109 and a divisor code signal 103 have respectively different codes, and at the time of having the same code, instructed so as to subtract the signal 105 and the data 101 from each other. Only in the 1st cycle, a latch 110 latches the value of the code signal 109 and a register 108 stores the output data 107 of the ALU 106. Finally, code correction and data repairment are executed by the output signal 114 of the latch 110 and the code signal 103. Thus, code- added non-recovery type division can be rapidly executed. |
