| 摘要 |
<p>Output of a profetch request signal is so controlled as to adjust a capacity of an instruction buffer (1) for prefetching instructions and used in a computer for pipeline processing to an optimum capacity which is required corresponding to any given case. The optimum capacity is suitably set in a control resistor (7), and the decision whether the request signal be outputted or not is made in comparison with the empty state of resistors (1a-1d) in the instruction buffet (1).</p> |
