SEMICONDUCTOR MEMORY SYSTEMS AND METHODS OF OPERATING THEM

摘要

A self-testing and self-repairing memory system (3-15) is presented as well as a method for using it and a method for making it. This memory system is constructed from memory chips (3-1 that have passed an abbreviated wafer probe test. After the memory system (3-15) is assembled, it tests itself to locate defective memory cells (3-5). The memory system (3-15) may decide to correct these defective memory cells (3-5) or it may decide to correct them using an error correction code engine (3-3). This memory system (3-15) tests itself during field use to locate defective memory cells. Once these defective memory cells (3-5) are located, the memory system (3-15) uses the error correction code engine (3-3) to correct these defective memory cells (3-5). When the error correction code engine (3-3) becomes overburdened with defective memory cells (3-5), then the memory system (3-15) replaces these defective memory cells (3-5).