发明名称 TRANSMISSION SYSTEM EXCHANGE NETWORK AND EXCHANGE NETWORK CONTROLLER
摘要 <p>PURPOSE: To prevent the delay of a packet and to evade occurrence of collision by constituting a space divided multiplex exchange circuit of elements having an exchange point stage followed by a comparator, an input buffer, a determination circuit, and a clock signal control circuit. CONSTITUTION: This exchange circuit is constructed by elements having the same constitution so that each switched circuit is divided into each stage. These elements have the stage of an exchange point CP followed by a comparator C, an input buffer B, a determination circuit CA, and a clock signal control circuit T respectively allocated to the elements. The circuit CA connected to both the comparator C and exchange point CP determines the order of feed lines Z arrayed in each line to be exchanged.</p>
申请公布号 JPH024073(A) 申请公布日期 1990.01.09
申请号 JP19880319694 申请日期 1988.12.20
申请人 PHILIPS GLOEILAMPENFAB:NV 发明人 URURITSUHI RUDORUFU PETERU KIRATSUTO;YOHAN EMIRU UIRUHERUMU KURIYUUGAA
分类号 H04M3/00;H04L12/935;H04L12/937 主分类号 H04M3/00
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