| 摘要 |
<p>PURPOSE:To eliminate the need for processing the interruption of other processor, and to quickly respond to plural interrupting causes by providing an address selection circuit to load selectively the data of a first program counter to a second program counter. CONSTITUTION:An effective address is determined by a second program counter 30 where the data of a first program counter 31 is loaded in parallel, and the address selection circuit 42 outputs an interruption request 44 according to the chip select data of an input/output port 40 in an input mode or by a control signal to be inputted directly. Further, after waiting for an interruption response 45, it loads the address data of the input/output port 40 as a substitute for the data of the first program counter 31 to the second program counter 30, and acts so as to transfer the control of the processor to this address. Thus, the unnecessary interruption of a program due to the interruption from other processor is removed, and it becomes possible to respond quickly to unlimited interruption requests.</p> |
