发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:Not only to simplify a Y column wiring but also to improve a circuit in integration by a method wherein memory cells which store data from a data line and the wiring arranged in column, formed on this memory cell region, which sends memory cell data are provided. CONSTITUTION:For instance, when a data write line WBn is specified out of data write lines WB0-WBn, a P-channel transistor 10 corresponding to the line WBn is turned ON and data is inputted from a data line. And, the above data is retained with a latching circuit 8. This operation is performed toward each of the whole data write lines WB0-WBn, and a data read line RBn, for example, is specified out of data read lines RB0-RBn after data are retained in all the latch circuits 8, whereby a P-channel transistor 11 is made ON to output the data of the latch circuit 8 from an terminal DOn.
申请公布号 JPH021973(A) 申请公布日期 1990.01.08
申请号 JP19880142226 申请日期 1988.06.09
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAGATOMI ATSUSHI
分类号 H01L21/82;H01L27/10;H01L27/118 主分类号 H01L21/82
代理机构 代理人
主权项
地址