发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To shorten the length in the longitudinal direction of a work line in cell array so as to enable the area of the entire cell array to be reduced by varying only the internal between a pair of data lines holding a column selecting line from those between other data lines, and narrowing the intervals between other data lines than that column of a pair of data lines. CONSTITUTION:A column selection line 14 is arranged between data lines 7a and 7b, and only that interval differs from the intervals of other data lines 7. That is, the intervals between data lines that the column selection line 14 does not pass become the minimum intervals regulated by stipulation of wiring such as wiring capacity, etc. Since the data lines 7 at the positions that the column selection line 14 does not pass in memory mats A1, B1, A2 and B2 are separately arranged at minimum intervals, the length of the unit d is shortened. Accordingly, the lengths in the Y direction of the memory mats A1, B1, A2 and B2 are shortened, and the entire area of the cell array is reduced.
申请公布号 JPH023276(A) 申请公布日期 1990.01.08
申请号 JP19880150316 申请日期 1988.06.20
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 FUKUDA HIROSHI;NAKAKOSHI YOSHINORI;SAIE YASUHIKO;YOSHIDA HIROSHI;YASU YOSHIHIKO
分类号 G11C11/401;G11C11/34;H01L21/3205;H01L21/8244;H01L23/52;H01L27/10;H01L27/11 主分类号 G11C11/401
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