| 摘要 |
PURPOSE: To improve the quality of an insulator boundary in an integrated circuit interconnection system by etching an upper side face of an insulation layer before a second conductor material to form a succeeding layer is deposited on the insulation layer at a rate higher than that for first conductor material after the first conduction material is removed through etching and a plug material is left in a hole so as to form a new upper side face. CONSTITUTION: A sacrificial flat layer 7 is provided by depositing other material first conductor materials 4A, 4B on an upper side face 3 of an insulation layer 1 and in a hole 2 up to a thickness enough to make an upper side face 8 made of other material flat. The layer 7 in this etching processing is carried out at the same rate as or close to the etching rate of the insulation layer 1 in comparison with the case with the first conductor materials. Then the surface part of the flat layer 7 and the insulation layer 1 are removed through etching, and a level of a new upper side face 9 of the insulation layer 1 is formed nearly equal to or lower than that of an upper side face of the first conductor materials 4A, 4B in the hole 2. Thus, a silicon dioxide is removed from a surface 3 of the insulation layer 1 by a thickness of, e.g. about 0.5μm to form a new surface 9. Thus, deteriorated flatness that might cause a problem of a step range on a succeeding layer deposited on the plug material in the hole and an upper side face of the insulation layer at mass-production is prevented.
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