| 摘要 |
PURPOSE:To effectively use terminals of a semiconductor integrated arithmetic processing device to perform unificative examination by delaying the reset signal, which is obtained by a mode converting circuit, in a reset delay circuit by a prescribed time based on a serial data string inputted to a reset terminal with a system clock as the reference. CONSTITUTION:At the time of mode setting, the signal on a signal line 6 of serial data based on the system clock from a reset terminal 5 is converted to a mode signal to the CPU 1 and a reset mode signal to a reset delay circuit 2 by a mode converting circuit 3. At the time of reset, the input signal from the terminal 5 is converted to a serial data string all set to the low level, and the reset state in the circuit 3 is released at the same timing as an external signal and the signal to the circuit 2 to prevent the extension of delay of reset, and the time when a reset mode signal line 7 resets the CPU 1 is delayed by the circuit 2 until the system clock is switched from the stop state to the normal state. |
