Programmable gate arrangement

摘要

A memory matrix of a logical gate arrangement contains a number of independent data sets, each of which defines a logical function of the gate arrangement. Each data set can be activated for dynamic configuration of the gate arrangement by selecting its address. To change the function, the transfer of the memory contents to the traditional two-dimensional matrix is omitted, since only the address of the corresponding memory plane must be passed over. The gate arrangement can be used instead of microprocessors, to achieve much faster program running.