发明名称 SIGNAL SEQUENCE DETECTING CIRCUIT
摘要 PURPOSE:To rewrite a microprogram to form a sequence detecting circuit, by setting the state of a signal to be detected to an expected value register and making it possible to select and execute different processing procedures for the same change of the noticed signal. CONSTITUTION:Respective bits of an expected value register 1 are allowed to correspond to signals A-H of a signal group 2 and are set to 0 or 1 in accodance with the state of a signal to be detected of each bit. NOT of exclusive OR between each bit of the register 1 and a corresponding signal of the signal group 2 is operated in an XNOR network 3. AND between the bit output from a mask register 4 corresponding to the output of the network 3 and a corresponding bit outputted from the network 3 is operated in an AND network 5. Eight outputs from the network 5 are selected preferentially and are encoded by a priority encoder 6 and are applied to a microprogram memory through an address determining circuit 8 by an address from an internal state memory 7, and the program is rewritten and is executed.
申请公布号 JPS58132821(A) 申请公布日期 1983.08.08
申请号 JP19820014859 申请日期 1982.02.03
申请人 TOKYO SHIBAURA DENKI KK 发明人 MIYATA MISAO;YAMAZAKI ISAMU
分类号 G06F9/22;G06F9/26 主分类号 G06F9/22
代理机构 代理人
主权项
地址