发明名称 Integrated current-mirror arrangement comprising vertical transistors.
摘要 <p>A current-mirror arrangement comprises a first and a second transistor whose bases are interconnected and connected to the collector of the first transistor. The transistors are constructed as vertical transistors each having a collector region (23a, 23b) of a first conductivity type, isolated from a substrate (21) of the first conductivity type by an intermediate layer (22) of a second conductivity type, a connection being provided between said intermediate layer (22) and the interconnected bases (29, 30) of the two transistors.</p>
申请公布号 EP0346978(A1) 申请公布日期 1989.12.20
申请号 EP19890201487 申请日期 1989.06.09
申请人 N.V. PHILIPS' GLOEILAMPENFABRIEKEN 发明人 BUITENDIJK, PIETER
分类号 H01L29/73;G05F3/26;H01L21/331;H01L21/8222;H01L27/07;H01L27/082;H01L29/732;H03F3/343 主分类号 H01L29/73
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