Error detection system

摘要

An error detecting apparatus in which an error within an arbitrary and continuous (b-1) bit block is detected using a SEC-DED-SbED code. The (b-1) bit block is any continuous (b-1) bit block within an information consisting of several b bit blocks. The data are encoded by using a power of a matrix C, defined as: <IMAGE> and a matrix B. Matrix B is comprised by arbitrarily replacing the rows and columns of the power of C matrix with row vectors from a set of (b+1) vectors: <IMAGE> The partial matrices obtained from matrices B and C are used to construct a parity matrix. Syndromes are computed from the information and the party matrix to detect errors.