发明名称 SERIAL/PARALLEL CONVERTER
摘要 PURPOSE:To control without considering skew proper to a product by providing a latch signal generation circuit, and generating a latch signal in the inside of a device. CONSTITUTION:The title converter is constituted of a shift register 11, a latch circuit 12, and the latch signal generation circuit 13. A serial clock signal SSC and a control signal CONT are inputted to the latch signal generation circuit 13, and the latch signal La generated by the input of the control signal CONT, after being delayed for the serial clock signal SSC, is inputted to the latch circuit 12. Therefore, it is possible to perform design and manufacturing by applying adjustment so as to generate the optimum latch signal on each element. In such a way, the control can be applied without considering the skew, etc., proper to every product.
申请公布号 JPH01311622(A) 申请公布日期 1989.12.15
申请号 JP19880142978 申请日期 1988.06.09
申请人 NEC CORP 发明人 KOBAYASHI KATSUTARO
分类号 H03M9/00 主分类号 H03M9/00
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