| 摘要 |
PURPOSE:To prevent constitution from being made into a large scale and to reduce a delay time by providing the constitution to invert a required number of bits and the one to detect the coincidence of each signal including an inverted signal. CONSTITUTION:A reception signal is introduced to a shift register 100 via an input line 2. At the output terminals Di and -Di with both positive and negative polarity at each stage of the shift register 100, the terminal at a side where respective output signal goes to an L level when frame synchronization data fill the shift register 100 is selected, and the output signal of a wired-OR coupling part 200 is supplied to a counter 5, and the counter 5 steps when the signal with the L level is supplied. Therefore, it is enough to set the level of each signal at the L level by inverting a required number of bits in the frame synchronization data at the shift register 100, and to detect the coincidence of each signal including the inverted signal by performing wired-OR coupling, thereby, an EX-OR gate can be eliminated. In such a way, it is possible to realize the miniaturization of the constitution and to reduce the delay time. |
