摘要 |
<p>In a "Futurebus+" backplane, at each end of the backplane the signal lines are each electrically connected to a power bus on a face of the board or to a power plane encapsulated in the board via a discrete resistor mounted on the face of the board and separately formed with respect to the other resistors and the ground lines are each electrically connected to the power bus or power plane via a discrete capacitor mounted on the face of the board and separately formed with respect to the other capacitors. Preferably, at each end of the backplane the discrete resistors and capacitors are mounted on both faces of the board, the number on one face being approximately the same as the number on the other face. In the event that a resistor or capacitor should be faulty, only the signal or ground line to which the faulty resistor or capacitor is connected will be out of service until the faulty resistor or capacitor is replaced.</p> |