发明名称 Loadcells
摘要 An AC exciter 16, 18, 20 for a loadcell 22 is constructed to provide an excitation waveform which pauses at a substantially zero value for a period of time sufficient for rectifier means 28 in the loadcell signal path to operate, such that small phase shifts have no effect upon the rectified loadcell signal, which therefore has negligible drift due to the electronic circuitry. The loadcell signal is supplied to an integrating A/D converter 42, 44, 46, 48 in which a reference signal is pulse-width modulated at 44 to equalise and balance the weight signal, both supplied to integrator 42. The cycle time of the pulse width modulation is synchronised with the loadcell excitation supply and the time ratio is measured by counting clock pulses until balance is achieved. The pulse width modulation is maintained after equalisation until the next clock pulse has been counted, thereby to accumulate an imbalance in the integrator 42 until equalisation occurs one clock pulse early. The over and under value counts are stored and averaged to provide a measuring resolution of less than one clock pulse per excitation cycle. <IMAGE>
申请公布号 GB2219659(A) 申请公布日期 1989.12.13
申请号 GB19880013621 申请日期 1988.06.09
申请人 * CHRONOS RICHARDSON LIMITED 发明人 ANDREW * MERRICK
分类号 G01G3/145;H03M1/00 主分类号 G01G3/145
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