发明名称 DIGITAL SIGNAL PROCESSOR
摘要 PURPOSE:To perform the parallel processing of an arithmetic processing and data transfer by separating an input bus which transfers data from a memory to a multiplier from an output bus which transfers a computed result from the multiplier to the memory. CONSTITUTION:When the computation of Ai=BiXCi(i=1-10) is performed, Bi is stored in the memory 30-1 and Ci in the memory 30-2, and the computed result Ai is stored in the memory 30-1. Firstly, B1 and C1 are read out from the memories 30-1 and 30-2, and are inputted to a computing element 23 via input data buses 21-1 and 21-2, and the computed result A1 is stored in a product register 24. A1 stored in the register 24 is written on the memory 30-1 via a shifter 25, an output data bus 22, and a write line 30-1a, and in parallel with the operation, next data B2 and C2 in the memory 30-1 are inputted to the computing element 23 via the data buses 21-1 and 21-2, and the computed result A2 is stored in the register 24.
申请公布号 JPH01305424(A) 申请公布日期 1989.12.08
申请号 JP19880136789 申请日期 1988.06.03
申请人 OKI ELECTRIC IND CO LTD 发明人 SHINPO ATSUSHI;UEHARA TERUAKI;ANDO HIROMI;TSUKAGOSHI SHOSAKU
分类号 G06F7/00;G06F17/10 主分类号 G06F7/00
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