发明名称
摘要 PURPOSE:To solve the problem of the accumulation of fixed charge which occurs when only a capacitor is connected to the input terminal of an MOS operational amplifier, by connecting a switched capacitor between the output terminal and input terminal of an operational amplifier. CONSTITUTION:An operation amplifier 101 with MOS structure and capacitors 102 and 103 integrated in the same chip with said amplifier are provided, and the output terminal 106 of the operational amplifier 101 of an arithmetic circuit whose arithmetic coefficient is determined by the capacity ratio of said capacitors, and one input terminal 105, a switched capacitor consisting of a switch and a capacitor is connected. For example, the out-of-phase amplifying circuit in a figure is provided with MOS transistor TRs 202 and 203 operating as switches, and an integrated capacitor 201 as a discharging means for fixed charge, and out-of-phase clock signals are inputted to the gates of the TRs 202 and 203 to make a switched capacitor, consisting of the capacitor 201 and the TRs 202 and 203, operates equivalently to a resistance.
申请公布号 JPH0157833(B2) 申请公布日期 1989.12.07
申请号 JP19800188120 申请日期 1980.12.29
申请人 SEIKO EPSON CORP 发明人 MISAWA TOSHUKI
分类号 H03K4/02;G06G7/186 主分类号 H03K4/02
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