| 摘要 |
PURPOSE:To improve the stability and accuracy of the synchronism operation, by synchronizing a frequency divider provided newly with a reference clock and synchronizing an arithmetic device with the refernce clock after the output frequency of a VCO within the operating range of a frequency divider of the arithmetic device. CONSTITUTION:The system consists of a frequency divider 5 and a signal switching circuit 6. At the initial stage, the logical value of a switching signal SW of the circuit 6 is brought into 0. A reference signal fc is generated from an oscillator 1, and the frequency difference between the frequency dividing frequency and the signal fc from the frequency divider 5 is detected at a synchronizing detector 2. This frequency difference is converged to a constant value with the control of a voltage control type oscillator VC03 gradually. This is the same for the phase difference. The frequency of an output signal fv of the VC03 is possible for frequency division of a frequency divider 41 of an arithmetric device 4, then a logical value of the signal Sw is inverted into 1, and a frequency dividing signal fN1 of the frequency divider 41 is applied to the detector 2. Thus, the frequency divider 41 of the device 4 is made easily synchronized and is kept. In this state, the characteristic test of the device 4 is attained. |
