| 摘要 |
PURPOSE:To attain debugging under normal conditions by inputting an access storage device number and an access address for a holding opportunity and holding the contents of the storage device without interrupting the processing of a CPU. CONSTITUTION:A device specifying signal 81 is continuously sent from the CPU to terminals 3 and the access addresses A-N of a storage device 81 are sent to a terminal 4. The storage device 81 number set by the operator, the access address D to be a holding opportunity and the contents of a data holding storage device 84 are inputted to terminals 5, 6, 7, respectively. When the operator inputs a developmemt starting signal to a terminal 7, a specification signal is sent from a device specification signal output terminal 9 to the storage devices 81, 84. At the input of the access address D to the terminal 4, output signals are sent to terminals 10, 11 and the device specification signal to the storage device 84 is inhibited. |
