| 摘要 |
PURPOSE:To set the number of input terminals to be two and to simplify the setting of data without the necessity of an enable signal from outside by providing a counter in a data setting circuit and generating the reset signal of the counter and a latch signal by means of a data signal and a clock signal. CONSTITUTION:When the clock signal changes from a level L to a level H at the time of setting data, the data signal is set in the level H, whereby a control circuit 9 generates the reset signal 10 of the counter 11 so as to reset the counter 11. Next, data is written into a shift register 4 when the clock signal changes from the level H to the level L. At that time, the counter 11 simultaneously counts the clock signal. When data is the objective number of bits are impressed, the latch signal 8 is generated from the counter 11, and respective output signals 5 of the register 4 are read by a latch 6, whereby data is set. |
