METHOD FOR MAKING A METALLIC INTERCONNECTION PATTERN OF THE COMPONENTS OF A VERY DENSE INTEGRATED CIRCUIT

摘要

A method of forming a planarization layer over a multilayered metal network which interconnects the components of a high-density integrated circuit and which includes conductors having steep edges disposed over a substrate. A layer of spin-on-glass is applied over the lower metal layer so as to have a thickness substantially equal to that of the lower metal layer and to form a thin film over the conductors. The spin-on-glass layer is uniformly etched to expose the upper surfaces of the conductors, and a dielectric layer is applied onto the etched spin-on-glass layer and upper surfaces of the conductors.