| 摘要 |
PURPOSE:To reduce an oscillating stop voltage only for a specified period of time at a necessary time, by a method wherein 2 sets of regulating CMOS transistors in an oscillating circuit are operated in parallel via a memory circuit being set for a given time at a time when a power source is applied and a heavy load is applied. CONSTITUTION:By means of a signal, responding in conformity with making of power source switch, a buzzer, a lamp-lighting switch, from an OR circuit 11, an FF 10 is brought to a set condition for a given period of time through a counter 12. A second CMOSFET for control, consisting of P type and N type FET 3 and 4 and being connected to a crystal oscillator 5 in an oscillating circuit with the controlling P type and N type FET turned ON, operates in parallel to a similar first CMOSFET only during a given period of time. This causes increasing of and reducing of an oscillating stop voltage to perform an oscillation without any trouble even at a time when a voltage reduces when a power source is applied and a heavy load is applied due to driving of a buzzer and a lamp. Meanwhile, the reducing period of the oscillating stop voltage is limited to a given period of time, and this prevents the unnecessary increase of a consumption power due to the increase in a control current. |
