发明名称 PROGRAMMABLE SEMICONDUCTOR LOGIC DEVICE
摘要 PURPOSE:To reduce the test time and to save man-hour by attaining the test of plural OR array drivers at the same time in a PLD having a test circuit of an OR array driver to drive the OR array section. CONSTITUTION:A PLD(Programmable Logic Device) has a test circuit for an OR array driver 3 to drive an OR array section 4. Then an OR dummy array section 7A is grouped and the resulting groups are selected simultaneously in parallel to test the OR array driver 3, then plural OR array drivers 3 are tested at once. Thus, the PLD is obtained, in which the test time is reduced and man-hour is saved.
申请公布号 JPH01300619(A) 申请公布日期 1989.12.05
申请号 JP19880131211 申请日期 1988.05.28
申请人 FUJITSU LTD 发明人 OKAWA TAKASHI
分类号 H03K19/177;G01R31/3185 主分类号 H03K19/177
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