发明名称 IMMUNITY TESTING CIRCUIT
摘要 <p>PURPOSE:To reduce a noise voltage to an opposite device side and to accurately measure characteristics by connecting impedance circuits which are equal in value to one another between a balanced couple of transmission lines between a transformer and a common mode choke coil. CONSTITUTION:The impedance circuits Z1 and Z2 which are nearly equal in value to each other are connected between the ground and the lines of the balanced couple of transmission lines L between the transformer T and common mode choke coil CH. While the output level of a noise generator G, the fre quency or waveform of the generated noise voltage is varied, the error of a digital signal transmitted and received between devices Q1 and Q2 through the transmission line L is observed. At this time, a noise applied to the genera tor G is effective to only the device Q1 to be tested and exerts no influence upon the opposite device Q2. Thus, the characteristics are accurately tested.</p>
申请公布号 JPH01297918(A) 申请公布日期 1989.12.01
申请号 JP19880127075 申请日期 1988.05.26
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 IKEDA NAOJI;HATTORI MITSUO;IDEGUCHI TAKESHI
分类号 H04L25/02;H04B3/46 主分类号 H04L25/02
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