| 摘要 |
PURPOSE:To optimize the practical refresh period of a dynamic type RAM or the like without changing the specification of a product by providing the title device with a fuse means to selectively change the number of work lines to be simultaneously set up to a selecting state in plural memory arrays. CONSTITUTION:The dynamic type RAMs are ranked to plural product ranks in accordance with its operating speed and includes a fuse means F1 to be selectively cut off at its optimum speed product rank. An internal control signal fv to be selectively turned to a low level by cutting off the mean F1 is supplied from a timing generating circuit TG to row address decoders RD0-RD3 in common. In the memory arrays MARY0-MARY3, four word lines in total specified by interpolated internal address signal ax2-axi-2 and word line selecting timing signals phix0-phix3 are simultaneously set up to a selecting state. Consequently, the practical refresh period can be optimized without changing the product specifications relating to the refresh period. |
