| 摘要 |
A subranging analog-to-digital converter circuit (11) is disclosed which incorporates adaptive error correction for a high accuracy digitization of analog input signals. In a subranging analog-to-digital converter, a test circuit (41) for generating a series of digital test signals is provided. Included with the test circuit is a highly accurate, digital-to-analog converter (43) for converting the digital test signals to a respective series of accurate analog test signals for input to the subranging converter. The digital test signals are compared (47) with the respective outputs of the least significant bit quantizer of the subranging A/D converter, and correction signals for each subrange are stored in a memory storage means (49). The memory storage means (49) is addressed to provide the respective correction signal by signals from the MSB quantizer (17). In one embodiment, at least one test signal, preferably at mid-range, is used for each subrange. In another embodiment, numerous test signals for each subrange are used. |
