| 摘要 |
PURPOSE:To make the operating speed of the title circuit faster by constituting the circuit of exclusive 'OR' circuits, precharge and discharge MOSFETs, and logical gate circuits as a dynamic type OR circuit having a one-stage structure substantially. CONSTITUTION:Two sets of input data A0-An and B0-Bn are supplied to exclusive 'OR' circuits E01-E03. The output node n3 of the circuit E01 is selectively set to an 'H' level when the signals A0 and B0 do not coincide with each other. On the other hand, when a timing signal is set to an 'H' level and the signal, the inverse of phi are set to an 'L' level, MODFETs Q1 and Q14-Q16 are turned off and Q17-Q19 are turned on and corresponding MOSFETs Q11-Q13 are selectively turned on. Therefore, an output signal DM becomes an 'H' level. Moreover, when the signal phi goes to 'H' in level and a node n1 is discharged, an MOSFET Q20 is turned on. As a result, the node n1 is quickly discharged and the operating speed of this comparison circuit is increased. |
