| 摘要 |
<p>A semiconductor memory device having a redundant cell array and provided with an improved indicating circuit of the selection state of the redundant cell array is disclosed. The memory device comprises a tri-state type output circuit for generating read-out data from the selected memory cell at an output terminal, a detection circuit for generating a detection signal when the memory cell of the redundant cell array is selected and a control circuit for disenabling the output circuit thereby to make the output terminal at a high impedance state in response to the detection signal.</p> |
