| 摘要 |
<p>PURPOSE:To attain high speed reading and page mode reading by necessarily connecting two two-dividing bit lines and connecting a dummy cell to the bit line in the non-volatile semiconductor storage of a floating gate type transistor. CONSTITUTION:A sense amplifier 13 is provided between two two-dividing bit lines 11 and 15 and between two-dividing bit lines 16 and 19, to which dummy cells 20, 21, 24 and 25 are respectively connected. When a memory cell 1, etc., is selected, the respective lines 11 and 19 are connected through transfer gates 12 and 18 to nodes N1 and N2 of the amplifier 13 and the line 19 and node N2 are charged by a cell 25. In case of an erase condition and a low threshold, the cell 1 is turned on and the line 11 is charged by the cell 1. Then, the node N1 goes to a higher potential than the node N2. In a writing condition, the node N1 goes to the high potential and the respective potentials are amplified by an amplifier 3 and outputted through transistors 28 and 29 to an I/O line. By the giving of a referring potential from this dummy cell, the memory cell goes to be small and a high speed access can be executed. Then, the sense amplifier is connected in each bit line and the page mode reading can be executed.</p> |
