发明名称 |
Process for producing interconnect structures on a semiconductor device, especially on an LSI circuit. |
摘要 |
<p>Process of the type consisting in obtaining a contact with an active zone (11) carried by a semiconductor substrate (10) by means of conductive pins (18a) located in the contact apertures (16c) of an insulating layer (12), and in then producing a metal interconnection structure (22) effecting the conductive link with the conductive pins (18a).
<??>A separation layer (13) is provided between the insulating layer (12) and the conductive layer (18) which can be removed selectively relative to the insulating layer (12). Thus, the insulating layer (12) retains its initial flatness and the conductive pins (18a) have an upper level (20) which stands slightly proud of the level (21) of the insulating layer (12), thus favouring contact between these pins (18a) and the metal interconnection structure (22).
<??>Application to large-scale integration microcircuits.
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申请公布号 |
EP0343698(A1) |
申请公布日期 |
1989.11.29 |
申请号 |
EP19890200972 |
申请日期 |
1989.04.17 |
申请人 |
N.V. PHILIPS' GLOEILAMPENFABRIEKEN |
发明人 |
GRIEF, MALCOLM;DOAN, TRUNG;VAN HOUTUN, HENDRIKUS;VAN LAARHOVEN, JOSEPHUS |
分类号 |
H01L21/3205;H01L21/768;H01L23/52 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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