| 摘要 |
PURPOSE:To improve integration scale, by forming a groove from the surface of a single crysal silicon substrate, forming a gate electrode on the side wall of the groove through a gate insulating film, forming a diffused layer on the bottom part of the groove, and forming a lead-out electrode from the diffused layer through an interlayer insulating film which covers the gate electrode. CONSTITUTION:A groove is formed from the surface of an Si substrate 1. A gate insulating film 3 is formed on the side wall of the groove. An embedded diffused Iayer 2 is formed on the bottom part of the groove. A gate electrode 4 is formed on the surface of the gate insulating film 3. An interlayer insulating film 5 is formed on the surface of the gate electrode 4. A lead-out electrode 6 which is continued to the embedded diffused layer 2 is formed through the interlayer insulating film 5. Diffused layers which are formed on both ends of the groove are used as a source (1) 7 and a source (2) 8. The gate electrode 4 is used as a gate (1) 9 and a gate (2) 10. The lead-out electrode 6 is used as a device for an output 11. Two MOS type field effect transistors constituted in this way form an inverter circuit. Thus, the scale of integration is improved. |
