| 摘要 |
A memory circuit which can operate with low power consumption. First and second bit lines are coupled to first and second input nodes of a sense amplifier through first and second transistors, respectively. The first transistor is disenabled with the second transistor enabled when a write data signal is applied to the second bit line. After the state of the sense amplifier is determined by the write data signal, the level of the first bit line is determined by the write data signal, the level of the first bit line is determined by the sense amplifier by the enabled first transistor. |
