发明名称
摘要 <p>PURPOSE:To make it possible to switch clocks under the running state of a system by forming a means for counting up the specific number of clocks. CONSTITUTION:When a flag 23 is turned on, a clock counting circuit CCC 24 starts to count up the number of system clocks supplied to a processor. At the time when a processor A 11 recognizes a time required for branch from a common firmware 22 in a peripheral device 2 to its firmwave A 110 by executing the succeeding branch instruction, the processor A 11 outputs a signal to switch the phase of an inner clock of the peripheral device 2 side to a clock switching circuit 21 at the timing of system clock decay, for instance, and functioned so as to invert the phase of the inner clock.</p>
申请公布号 JPH0154739(B2) 申请公布日期 1989.11.21
申请号 JP19850132531 申请日期 1985.06.18
申请人 PFU LTD 发明人 SUMI HIDEKI;SADATA YOSHIHIRO
分类号 G06F15/16;G06F9/52;G06F15/177 主分类号 G06F15/16
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