发明名称 MASTER SLICE TYPE SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To make it possible to cope with favorably to a modification of an arrangement pitch between pads by a method wherein a number of input/output cells per one piece of a pad is set according to the arrangement pitch. CONSTITUTION:A number of input/output cells 13a, 14b..., which are parallel- connected per one piece of a pad, is set according to an arrangement pitch between pads 14a, 14b... Accordingly, a readjustment of the design of the input/ output cells becomes unnecessary at the time of modification of the arrangement pitch between the pads and moreover, a load driving power can be selected according to the need without changing the size of a chip main body.
申请公布号 JPH01289138(A) 申请公布日期 1989.11.21
申请号 JP19880118765 申请日期 1988.05.16
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 TANAKA YASUNORI;KOBAYASHI TERUO;ISHIBASHI MASAHIRO
分类号 H01L21/822;H01L21/82;H01L23/528;H01L27/04;H01L27/118;H03K19/173 主分类号 H01L21/822
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