| 摘要 |
PURPOSE:To reduce the area of a memory cell by specifying a connection region of a bit line to the source of a transfer transistor by an insulating film formed by oxidizing a counter electrode on the side face of the electrode. CONSTITUTION:A semiconductor substrate 11 has a transfer transistor T1 having impurity diffused layers 13, 14 and a gate electrode WL2, a storage capacity C1 having a storage electrode 21, a dielectric film 22 and a counter electrode 23, and a bit lien BL1 wired thereon. A connecting region of the line BL1 to the source 14 of the transistor T1 is specified by an insulating film 24 formed by oxidizing a counter electrode on the side face of the electrode 23. Thus, since it is unnecessary to consider the aligning margin of a resistor resolution limit and its connecting region to the capacity C1 and the electrode 23 when the connecting region of the line BL1 to the source 14 of the transistor T1 is formed is not, a cell size can be reduced. |
