| 摘要 |
PURPOSE:To increase a readout margin and to improve a software error rate by setting a noise being received from an adjacent bit line via a line coupling capacitor by a bit line on one side of two bit lines equal to the one being received by the bit line on the other side. CONSTITUTION:Plural bit lines in a memory cell array 1 are connected to sense amplifiers SA via a bit line pair selection switch group 2a or 2b, and each sense amplifier SA is connected to data input line pairs I/O and -I/O via N-channel MOS transistors Q1 and Q2. In other words, each of plural sense amplifiers is connected to corresponding two bit lines. Actually, to both sides of the bit line on one side, another bit line to read out memory information and another bit line to which reference potential is supplied are neighbored, and the difference of readout potential can be prevented from being lowered by setting the magnitude of the noises generated in two bit lines. |
