发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To shorten leaking time and to normally latch the state of an output in a next-stage flip flop(F.F) by switching a potential supplied to a memory cell. CONSTITUTION:Transistors 12 and 13 to switch the potential to the side of N-channel transistors 91-105 of a memory part 5 are provided and the potential on the side of the N-channel transistors 91-105 of the memory part 5 is con nected to the side of a VDD until immediately before data are latched in a F.F 7. Consequently, a charge accumulated in a parasitic capacity can be com pletely held from getting out by the off-leaks of the transistors 91-105. Thus, by switching the potential on the side of the N-channel transistors 91-105 of the memory part 5 to the side of a VSS immediately before the data are latched in the F.F, the contents of the memory can be normally latched in the next stage F.F.</p>
申请公布号 JPH01285094(A) 申请公布日期 1989.11.16
申请号 JP19880112954 申请日期 1988.05.10
申请人 SEIKO INSTR INC 发明人 SEKIMOTO YASUHIKO
分类号 G11C17/18;G11C17/00 主分类号 G11C17/18
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