| 摘要 |
A static-type semiconductor memory device includes a word line discharging circuit which comprises, for each word line (WL1, WL2), a first transistor (T11, T12) for detecting the potential change of the word line, a time-constant circuit (C1, R11; C2, R12) for delaying the output of the first transistor, and a second transistor (T21, T22) for conducting a discharging current through the memory cells (MC1, MC2). The second transistor (T21, T22) is switched in response to the output of the time-constant circuit (C1, R11; C2 R12). A common discharging current source (Q1, R01) is also provided. Resistors (R1, R2) are provided between the word lines (WL1, WL2) and the common dlscharging current source (Q1, R01) for smoothing changes in the current flowing through the word lines, whereby double selection of the word lines is prevented. |
