| 发明名称 |
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| 摘要 |
PURPOSE:To enable to variably alter a frequency division ratio without increasing components by sharing the operation of relatively low frequency for the frequency division by a microcomputer. CONSTITUTION:A frequency generated by a reference frequency oscillator 1 is inputted to the terminal CLK of a programmable counter 2, an address code is inputted from the outputs 00-07 of microcomputer 3 to the address inputs P0- P7 to determine the frequency division ratio. The direct output of the counter 2 and the output of a binary counter 4 are inputted to a selective output circuit 5. The output of the counter 4 is applied as an interrupt to the microcomputer 3. The output which is divided in frequency by the software of the microcomputer 3 is inputted to the circuit 5. The final frequency output is obtained from the circuit 5. |
| 申请公布号 |
JPH0153812(B2) |
申请公布日期 |
1989.11.15 |
| 申请号 |
JP19820126912 |
申请日期 |
1982.07.20 |
| 申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
DEGUCHI TAKASHI;EJIMA YASUYUKI;TADAMATSU HIDEKAZU |
| 分类号 |
G05B19/02;H02M7/48;H03K3/72;H03K21/00;H03K23/66 |
主分类号 |
G05B19/02 |
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