发明名称 Logic circuit.
摘要 <p>A logic circuit having a differential amplifier comprising a transistor pair of first (T1) and second (T2) transistors and further comprising a third transistor (T3) connected in parallel with the second transistor (T2), a first driving circuit (1) operatively connected to drive the first and second transistors with complementary output signals (A, A) having a first (H1) and second (L1) levels, and a second driving circuit (2) operatively connected to drive the third transistor (T3) with an output signal (B) having third (H2) and fourth (L2) levels, one (H2) of which third and fourth levels is beyond one end of the range between the first and second levels and the other (L2) of which levels is either within that range or beyond the other end of that range.</p>
申请公布号 EP0341732(A2) 申请公布日期 1989.11.15
申请号 EP19890108588 申请日期 1989.05.12
申请人 FUJITSU LIMITED 发明人 SHIMOTSUHAMA, ISAO C/O FUJITSU LIMITED;EMORI, SHINJI C/O FUJITSU LIMITED;WATANABE, YOSHIO C/O FUJITSU LIMITED;TAMAMURA, MASAYA C/O FUJITSU LIMITED
分类号 H03K19/086;H03K19/094 主分类号 H03K19/086
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