| 摘要 |
PURPOSE:To allow the user to select which of the reduction of noise and the reduction of a delay time of an output buffer has higher priority by adopting the constitution such that the output impedance of the output buffer is varied externally. CONSTITUTION:An inverter 1 being a 1st output gate array consists of a P- channel transistor(TR) 1a and an N-channel TR 1b. A 2nd output buffer 6 using an input 2 from an internal circuit to the output buffer as the input and using an output 3 to an external pin as an output consists of P-channel TRs 7, 8, N-channel TRs 9, 10 and an inverter 11. A control signal 12 is given to the input of the inverter 11. At first, with the control signal 12 at an L level, both outputs from the 1st and 2nd output circuits 1, 6 are given to an output 3 leading to an external pin. In this case, the output impedance gate low. Then with the control signal 12 at H, the output from the 1st output circuit 1 only is given to the output 3 leading to the external pin and the output impedance is kept higher than the case when the control signal 12 is at L. |
