| 摘要 |
PURPOSE:To make the frequency shift constant independently of a modulation signal frequency and a carrier output frequency by using an equalizing section including a gain adjustment circuit and an equalizer so as to process the modulation signal. CONSTITUTION:A PLL circuit consists of a loop filter 4 having a prescribed low pass characteristic, a VCO 5 whose gain is Kv, and a 2nd frequency divider 6 whose frequency division number is 1/N frequency-dividing the oscillated frequency from the VCO 5 and feeding the result to a phase comparator 3 and is provided with a 1st equalizing section 9 and a 1st adder 10 to add a modulation signal while processing it. The transfer function G(s) of the 1st equalizing section 9 is expressed as G(s)=A.G1(s)+B.G2(s), where A=alpha/Kv, B=alpha/N, G1(s)=1/F(s), G2(s)=1/s.tau, F(s) is a transfer function of the loop filter 4 and (s) is the operator. In this case, the coefficient A is controlled inversely proportional to the gain Kv to maintain the relation of A.Kv=alpha (constant) and the coefficient B is controlled inversely proportional to the frequency division N to maintain the relation of B.N=alpha (constant). Thus, even if the carrier output frequency is varied, the frequency shift DELTAomega0(s) is kept constant. |
