| 摘要 |
PURPOSE:To reduce reactive power consumption of a feeding circuit, by detecting inter-line voltage of a subscriber's line, limiting input pulse width of a DC- DC converter in case when said voltage exceeds a reference value, and preventing generation of overvoltage when a line is opened. CONSTITUTION:An external clock signal is received by a CLK terminal, constant pulse width is generated by a pulse width generator PWM, the primary winding of a pulse transformer TR connected between a transistor TR Q1 and an electric power source B is turned on and off at a specified period, and electric power is transferred to the secondary winding side. The secondary side rectifies it by a filter circuit FIL, and after that, makes it flow as a service current to a subscriber load resistance RL, and executes floating feed. A variation of inter-line voltage VL by whether the resistance RL is large or small appears as fly-back voltage of the primary winding of the TR, in the collector of the TR Q1, and when a value which detects DET it exceeds threshold voltage VREF, a comparator COMP inputs an output to the PWM, and controls so as to narrow output pulse width of the RWM. |
