摘要 |
PURPOSE:To obtain the desired channel length through the control of over etching time by measuring a lot, development size of wafer, film thickness of polycrystalline silicon and a sheet resistance after phosphorus processing, based on a dynamic model indicating the change with time of under-cut amount. CONSTITUTION:The CVD process 201, polycrystalline silicon film thickness inspection process 202, resistance value inspection process 203, development process 204, development size inspection process 205, etching process 206 and the final inspection size process 207 are combined in series and many lots or wafers to be etched are sequentially sent to these processes. Then, simultaneous linear equations are formed using these measured values, a dynamic model is obtained by comparing measured values with the target values and thereby an over-etching time is determined for obtaining the desired channel length. Thereby, an error of obtained channel length is kept within 5%. |